In a fault-tolerant system which is constructed from two identical control devices, there is a requirement to establish consistent, i.e. identical, memory contents in both devices in order to guarantee uninterrupted operation in the event of a hardware defect in one of the two control devices. To this end, the memory contents must be transferred from the active control device to the inactive control device. In this situation, the active control device remains in operation and the contents of the memory of the active control device can be continually updated.
Until now, a hardware-based method or a software-based method has been used as a solution to this problem. With regard to the hardware-based method, all the data which is written to the memory of the active control device is transferred by way of an interface from the active control device to the inactive control device. To achieve this, it is necessary to sample the data externally on the memory interface of the active control device or internally in the north bridge of the active control device and forward it to the interface with the inactive control device.
Sampling and forwarding must either be able to occur quickly such that no data is lost, i.e. the bandwidth of the interface with the inactive control device must be at least as high as that of the memory interface, or there must be a capability to reduce the speed at which new data is written to the memory of the active control device, the speed of the CPU therefore, such that no loss of data results.
The following problems are encountered with the known hardware-based method:                The processing speed of the CPU is reduced as a result of the slowing down of the write data rate of the CPU.        In order to slow down the CPU, control of the CPU from the hardware side and thus access to the CPU bus are required. Access to the CPU bus may be undesirable or even impossible if, for example, the functionality of the north bridge is integrated in the CPU—a situation which will be encountered more frequently in future.        If the sampling of the write data takes place in the north bridge, as a rule, no conventional north bridge can be used. The development effort for a special north bridge which is then required is considerable.        
With regard to the software-based method, memory area tables are used for the CPU, and in that situation particularly the dirty bit which indicates whether write access has been made to a memory area. A task which is running in the background periodically checks the entries in the memory area tables and initiates the copying of memory areas to which write access has been made, i.e. their associated dirty bit is set.
The following problems are encountered with the known software-based method:                The background task which evaluates the entries in the memory area tables consumes CPU power.        It is necessary to ensure that the dirty bits can be utilized. Modem operating systems use the memory management unit of the CPU, which is responsible for management of the memory with the assistance of the memory area tables, and frequently manipulate the memory area tables during the process. The software-based method functions if the operating system does not use the memory management unit of the CPU, or is designed such that the method is supported directly by the operating system.        